1. Field of the Invention
The present invention relates to a semiconductor logic circuit comprising inverter, static random access memory (hereinafter called “SRAM”) and data latch circuit, and more particularly to a semiconductor logic circuit containing MOS transistor or memory element having a dual structure for preventing the malfunction due to a single event.
2. Description of Prior Art
A prior art semiconductor logic circuit, which comprises two inverters cross-connected to each other by connecting the output of one to the input of the other, has a structure comprising a flip-flop for retaining the data of 1 or 0 corresponding to a voltage level and a control element for executing the actions such as the proper writing and reading of data. In addition, a semiconductor logic circuit comprising a CMOS switch or a clocked inverter, which outputs the signal corresponding to the input data signal to a downstream under the control of the clock signal, can capture the input data signal to its inside under the control of the clock signal. With such a structure, SRAM can execute the writing, storing and reading of data, and a data latch circuit can capture data by the input of the clock signal and retain the data until the input of the next clock signal.
However, when the prior art semiconductor logic circuit in operation is irradiated by a high energy particle beam such as a radiation ray or an ion beam, electron-hole pairs are grown in the elements of the semiconductor logic circuit, and electric charge is generated. When the generated electric charge flows into the elements in the semiconductor logic circuit, it induces malfunction of them, such that the data stored in SRAM or latched in a data latch circuit is inverted, or a data is captured with no clock signal for action supplied in the data latch circuit. Such phenomenon is called “single event (single event upset).” This single event is often observed in the environment where the high energy particles tend to exist, such as high altitude air, aerospace and the facilities related to radioactive rays, and causes retardation in the regular performance of the computers under such environment. It is not practical to intercept such high energy particles completely in order to prevent the single event. Therefore, in order to prevent the single event effectively, it is necessary to achieve a semiconductor logic circuit having a structure which can prevent the single event by itself.